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SSRV (Super-Scalar RISC-V)

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Analyzed 2 days ago. based on code collected 2 days ago.

Project Summary

SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.

Tags

core cpu out_of_order risc_v

In a Nutshell, SSRV (Super-Scalar RISC-V)...

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has had 79 commits made by 3 contributors
representing 24,297 lines of code
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is mostly written in coq
with a very low number of source code comments
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has a young, but established codebase
maintained by nobody
with stable Y-O-Y commits
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took an estimated 6 years of effort (COCOMO model)
starting with its first commit in May, 2019
ending with its most recent commit almost 4 years ago

Quick Reference

Code Locations:

https://github.com/risclite/Supe...

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Project Security

Vulnerabilities per Version ( last 10 releases )

There are no reported vulnerabilities

Project Vulnerability Report

Security Confidence Index

Poor security track-record

Favorable security track-record

Vulnerability Exposure Index

Many reported vulnerabilities

Few reported vulnerabilities

About Project Vulnerability Report

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About Project Security

Code

Lines of Code

Activity

Commits per Month

Community

Contributors per Month

Languages

coq	44%
C	36%
HTML	10%
4 Other	10%

30 Day Summary

May 1 2024 — May 31 2024

0 Commits
0 Contributors

12 Month Summary

May 31 2023 — May 31 2024

0 Commits
0 Contributors

Most Recent Contributors

	risclite		Li Xinbing
	lixb

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