Tags : Browse Projects

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XiangShan

X

Analyzed about 2 hours ago

XiangShan (香山) is an open-source high-performance RISC-V processor project.

73.9K lines of code

0 current contributors

2 days since last commit

0 users on Open Hub

Very High Activity

I Use This

Mostly written in Scala

Licenses: apache_2

Tags cpu out_of_order risc_v

RISC-V BOOM

R

Analyzed 2 days ago

Berkeley Out-of-Order Machine, a out of order CPU based on the risc-v instruction set architecture.

30.4K lines of code

14 current contributors

16 days since last commit

0 users on Open Hub

Low Activity

I Use This

Mostly written in Scala

Licenses: No declared licenses

Tags cpu out_of_order risc_v

riscy-OOO

R

Analyzed 3 days ago

RiscyOO: RISC-V Out-of-Order Processor

6.43K lines of code

3 current contributors

almost 4 years since last commit

0 users on Open Hub

Inactive

I Use This

Mostly written in coq

Licenses: No declared licenses

Tags cpu out_of_order risc_v

SSRV (Super-Scalar RISC-V)

S

Analyzed 2 days ago

SSRV(Super-Scalar RISC-V) --- Super-scalar out-of-order RV32IMC CPU core, 6.4 CoreMark/MHz.

24.2K lines of code

0 current contributors

almost 4 years since last commit

0 users on Open Hub

Inactive

I Use This

Mostly written in coq

Licenses: No declared licenses

Tags core cpu out_of_order risc_v

RSD

R

Analyzed 2 days ago

RSD: RISC-V Out-of-Order Superscalar Processor

52.7K lines of code

0 current contributors

2 months since last commit

0 users on Open Hub

Low Activity

I Use This

Mostly written in Ruby

Licenses: No declared licenses

Tags cpu fpga out_of_order risc_v

Toooba

T

Analyzed 2 days ago

RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT

4.04M lines of code

0 current contributors

3 months since last commit

0 users on Open Hub

Very Low Activity

I Use This

Mostly written in coq

Licenses: No declared licenses

Tags cpu out_of_order risc_v

openc910

O

Analyzed 3 days ago

Alibaba c910 high performance RISC-V core.

434K lines of code

0 current contributors

about 1 year since last commit

0 users on Open Hub

Very Low Activity

I Use This

Mostly written in coq

Licenses: No declared licenses

Tags cpu out_of_order risc_v

vroom

V

Analyzed 4 days ago

a very high end RISC-V implementation , its goal is to be a cloud server class implementation. Licensed under the GPL, with a commercial license also available.

96.3K lines of code

0 current contributors

10 months since last commit

0 users on Open Hub

Very Low Activity

I Use This

Mostly written in coq

Licenses: No declared licenses

Tags cpu out_of_order risc_v

NaxRiscv

N

Analyzed about 7 hours ago

A out of order open source RISC-V core .

24.1K lines of code

0 current contributors

2 days since last commit

0 users on Open Hub

Moderate Activity

I Use This

Mostly written in Scala

Licenses: No declared licenses

Tags out_of_order risc_v